IA1

Question 1

What kind of dependences can be eliminated using register renaming techniques?

Accepted Answer

Output and anti-dependences.

Answer

True and output dependence

Answer

All types of depences

Answer

Antidependence and true dependences

Question 2

Find dependencies in the following code sequence:
St. 1. Loop: 	L.D  		F0, 0(R1)
St. 2.		ADD.D 	F4, F0, F2
St. 3.		S.D 		F4,0(R1)
St. 4. 		DADDUI 	R1,R1,-8
St. 5. 		BNE 		R1,R2,LOOP

Accepted Answer

There are true dependence between St1 and St2, output dependence between St2 and St3 and true dependence between St4 and St5.

Answer

There are true dependence between St1 and St2, output dependence between st2 and st3 and output dependece between st4 and st5

Answer

There are three true dependence: between st1 and st2, between st2 and st3 and between st4 and st5

Answer

No correct answer

Question 3

Gustafson’s Law (speedup) says that:

Accepted Answer

Speedup increase linearly with the number of used processors

Answer

Speedup is limited by sequential fraction of the program

Answer

There are no any speedup limitation

Answer

No correct answer

Question 4

What does it mean that network has blocking property?

Accepted Answer

It means that when one processor is accessing some memory block other processor cannot access different memory block.

Answer

It means that if one processor is accesing some memory block, other processor can not access the same memory block

Answer

It means that two different processor can not access the same memory location at the same tieme

Answer

No correct answer

Question 5

Suppose that you execute parallel program using 15 processors and that sequential fraction of your program is 20%. What is speedup which can be achieved?

Accepted Answer

5

Answer

15

Answer

10

Answer

No correct answer

Question 6

When we have a loop-carried dependence?

Accepted Answer

Whether data accesses in later iterations are dependent on the data values produced in earlier iterations

Answer

Whether data accesses in earlier iterations are dependent on the data produced in later iterations

Answer

When we have data dependence between different loop instruction

Answer

No correct answer

Question 7

Consider the mesh network with p processors as in figure below (no wraparoung connection). The communication time for one_to_all broadcast can be expressed by the following equation (m- message size):

Accepted Answer

No correct answer

Answer

s(ts+twm) * sqrt (p)

Answer

s(ts + twm) * sqrt(p)/2

Answer

2(ts + twm) *sqrt(p)-1

Question 8

RAW hazard is a consequence of:

Accepted Answer

Data dependence

Answer

Antidependence

Answer

Output dependence

Answer

Control dependence

Question 9

When we use the reservation station and Tomasulo's Scheme, instruction is divided onto:

Accepted Answer

NO correct answer

Answer

Five steps like using, standard pipeline

Answer

Four steps: issue, execute, write result, commit

Answer

Four steps: Fetch, Decode, Execute, Write result

Question 10

Hardward based speculation combines the following key ideas:

Accepted Answer

Dynamic branch prediction, dynamic scheduling and speculation to allow the execution of instruction before the control dependence are solved

Answer

Static branch predictions, dynamic scheduling and speculations to allow the execution of instructions before the control dependence are solved

Answer

Static branch predictions and register renaming

Answer

No correct answer

Question 11

When using hardware based speculation we need to add additional step during instructions execution called commit. There are following types of commits:

Accepted Answer

Normal and incorrect branch prediction commits

Answer

We have only one type of commit

Answer

Normal commit, store and forward commit and incorrect branch prediction commit

Answer

Normal and store commits

Question 12

What kind of partitioning should be used in parallel matrix multiplication algorithms

Accepted Answer

NO correct answer

Answer

domain partitioning

Answer

functional partitioning

Answer

domain or functional partitioning

Question 13

How we can define loop unrolling?

Accepted Answer

This technique restructures a loop by writing the iterations as straight-line code segments with only one loop control testing

Answer

This technique restructures a loop by writing the iterations as straight-line code segments, but still we need to perform loop control testing as many times as at the source loop

Answer

This techniques enables executing the loop with different order of instruction execution

Answer

No correct answer

Question 14

Duplication of data/ or computation takes place:

Accepted Answer

During the agglomeration and aims to reduce the cost of communication

Answer

We can not duplicate data or calculations, we have to avoid this.

Answer

It does not make sense, it increase the cost in the sense of the total processing time

Answer

Not correct answer

Question 15

What kind of communication, and for wich architecture is implemented by the following program fragment:

begin
left: (my_id_1) mod p;
right: (my_id_+1) mod p;
result: my_msg;
msg:=result;
for i:1 to p-1 do
begin
send msg to right;
receive msg from left;
result: restul E msg;
endofr
end

Accepted Answer

Communication all_to_all for ring architecture

Answer

Communication all_to_all for mesh architecture

Answer

Communication one_to_All for hypercube architecture

Answer

No correct answer

Question 16

What is a difference between store and forward and cut-trough routing mechanism?

Accepted Answer

In the store and forward routing the message is sending between processors and each intermediate processor store it in the local memory until received the whole message, when in cut-through routing the message is divied on parts which are sending between processors without waiting for the whole message

Answer

In the cut-through routing the message is sending between processors and each intermediate processor store it in the local memory until received the whole message, when in store and forward routing the message is divided on parts which are sending between processors without waiting for the whole message

Answer

There are no any difference, it depends on hardware features

Answer

Cut-thorugh routing is used for distributed memory computers, when store and forward for shared memory computers.

Question 17

When we used store and forward routing, total communication time can be expressed by the following equation

Accepted Answer

tcomm= ts + (mtw +th)l

Answer

tcomm= ts + mtw + lth

Answer

tcomm= (ts+ mtw + th) l

Answer

No correct answer

Question 18

Consider the following code
for(i=1; i<=100: i=i+1)
x[2*I+3] = x[2*I-1]*5.0;

Accepted Answer

The dependence exists

Answer

The dependence doesn't exists

Answer

You can not use GCD test for above example

Answer

NO correct answer

Question 19

The parallel system is scalable if

Accepted Answer

It maintain efficiency at a fixed value by simultaneously increasing the number of processors and the size of the problem

Answer

We can add the new resources and system still works

Answer

The efficiency increase linearly with the number of processors

Answer

No correct answer

Question 20

Considerer the following omega network. Is it blocking network?

Accepted Answer

Yes, it is blocking network, for example when processor 000 refers to memory 010 & processor 110 refers to memory 011

Answer

No, "omega" network is completely non-blocking network

Answer

Yes, it is blocking network,for example processor 000 referst to memory 010 & processor 011 referst to memory 010

Answer

No correct answer

IA1

🏆 Tabla de los mejores

✨ Parecidos

Evaluación Unidad 1

Evaluación Unidad 2

Evaluacion Unidad 3

Evaluacion Unidad 5

Evaluacion Unidad 4

Historia

🔥 Quizzes populares

cambios de estados

leyes de Newton

Test Cultura Griega

Evaluación sumativa Formador de Formadores

Cinemática

¿Puedes reconocer a estos científicos famosos?

Comentarios · 0

What kind of dependences can be eliminated using register renaming techniques?

Find dependencies in the following code sequence: St. 1. Loop: L.D F0, 0(R1) St. 2. ADD.D F4, F0, F2 St. 3. S.D F4,0(R1) St. 4. DADDUI R1,R1,-8 St. 5. BNE R1,R2,LOOP

Gustafson’s Law (speedup) says that:

What does it mean that network has blocking property?

Suppose that you execute parallel program using 15 processors and that sequential fraction of your program is 20%. What is speedup which can be achieved?

When we have a loop-carried dependence?

Consider the mesh network with p processors as in figure below (no wraparoung connection). The communication time for one_to_all broadcast can be expressed by the following equation (m- message size):

RAW hazard is a consequence of:

When we use the reservation station and Tomasulo's Scheme, instruction is divided onto:

Hardward based speculation combines the following key ideas:

When using hardware based speculation we need to add additional step during instructions execution called commit. There are following types of commits:

What kind of partitioning should be used in parallel matrix multiplication algorithms

How we can define loop unrolling?

Duplication of data/ or computation takes place:

What kind of communication, and for wich architecture is implemented by the following program fragment: begin left: (my_id_1) mod p; right: (my_id_+1) mod p; result: my_msg; msg:=result; for i:1 to p-1 do begin send msg to right; receive msg from left; result: restul E msg; endofr end

What is a difference between store and forward and cut-trough routing mechanism?

When we used store and forward routing, total communication time can be expressed by the following equation

Consider the following code for(i=1; i<=100: i=i+1) x[2I+3] = x[2I-1]*5.0;

The parallel system is scalable if

Considerer the following omega network. Is it blocking network?

IA1

🏆 Tabla de los mejores

✨ Parecidos

Evaluación Unidad 1

Evaluación Unidad 2

Evaluacion Unidad 3

Evaluacion Unidad 5

Evaluacion Unidad 4

Historia

🔥 Quizzes populares

cambios de estados

leyes de Newton

Test Cultura Griega

Evaluación sumativa Formador de Formadores

Cinemática

¿Puedes reconocer a estos científicos famosos?

Comentarios · 0

What kind of dependences can be eliminated using register renaming techniques?

Find dependencies in the following code sequence: St. 1. Loop: L.D F0, 0(R1) St. 2. ADD.D F4, F0, F2 St. 3. S.D F4,0(R1) St. 4. DADDUI R1,R1,-8 St. 5. BNE R1,R2,LOOP

Gustafson’s Law (speedup) says that:

What does it mean that network has blocking property?

Suppose that you execute parallel program using 15 processors and that sequential fraction of your program is 20%. What is speedup which can be achieved?

When we have a loop-carried dependence?

Consider the mesh network with p processors as in figure below (no wraparoung connection). The communication time for one_to_all broadcast can be expressed by the following equation (m- message size):

RAW hazard is a consequence of:

When we use the reservation station and Tomasulo's Scheme, instruction is divided onto:

Hardward based speculation combines the following key ideas:

When using hardware based speculation we need to add additional step during instructions execution called commit. There are following types of commits:

What kind of partitioning should be used in parallel matrix multiplication algorithms

How we can define loop unrolling?

Duplication of data/ or computation takes place:

What kind of communication, and for wich architecture is implemented by the following program fragment: begin left: (my_id_1) mod p; right: (my_id_+1) mod p; result: my_msg; msg:=result; for i:1 to p-1 do begin send msg to right; receive msg from left; result: restul E msg; endofr end

What is a difference between store and forward and cut-trough routing mechanism?

When we used store and forward routing, total communication time can be expressed by the following equation

Consider the following code for(i=1; i<=100: i=i+1) x[2*I+3] = x[2*I-1]*5.0;

The parallel system is scalable if

Considerer the following omega network. Is it blocking network?

Consider the following code for(i=1; i<=100: i=i+1) x[2I+3] = x[2I-1]*5.0;